Though the systems have some fundamental underlying similarities, each is tuned for specific workloads – either prototyping or emulation – and both offer significantly...
, has introduced a plethora of new platforms and tools in their hardware-assisted verification and virtual prototyping portfolios meant to streamline workflows and accelerate time to market for chips, systems and software across virtually all markets.
Synopsys introduced its latest HAPS prototyping and ZeBu emulation systems – the HAPS-200 and ZeBu-200 – featuring AMD’s latest Versal Premium VP1902 adaptive SoC, which deliver vastly improved capacity and better performance, compile times, and debugging capabilities. And just a couple of days ago, the company also introduced Virtualizer Native Execution on Arm Hardware, which is a comprehensive virtualizer suite supported on Arm server hardware, whether running in the cloud or on-premise, for modeling, simulation, debug, and analysis for Arm-based devices.The latest HAPS-200 prototyping and ZeBu-200 emulation systems are built on new Synopsys Emulation and Prototyping Hardware and target leading-edge chip and system designers and architects. Though the systems have some fundamental underlying similarities, each is tuned for specific workloads – either prototyping or emulation – and both offer significantly increased capacity and higher performance than its predecessor, toof today’s larger and more complex chips, systems and software. HAPS-200 offers comprehensive prototyping, which enables early software development and validation, and ultimately affords users better hardware-software integration. ZeBu-200 on the other hand is for broad, rich emulation, for thorough verification of complex chips and SoC designs with extensive debug capabilities. "With the industry approaching 100s of billions of gates per chip and 100s of millions of lines of software code in SoC and multi-die solutions, verification of advanced designs poses never before seen challenges,” said Ravi Subramanian, chief product management officer, Synopsys. “Continuing our strong partnership with AMD, our new systems deliver the highest HAV performance while offering the ultimate flexibility between prototyping and emulation use. Industry leaders are adopting Synopsys EP-Ready Hardware platforms for silicon to system verification and validation."The new HAPS-200 and ZeBu-200 are complementary systems, but each excels at different things. HAPS-200 has been updated and enhanced with more powerful platform hardware and offers approximately 4 times the performance of the company’s previous-gen system for pre-silicon hardware debugging. I should note, however, that the HAPS-200 still integrates with previous-gen systems. In fact, it leverages the existing HAPS-100 ecosystem and supports mixed HAPS-200/100 setups. The HAPS-200 is scalable from single FPGA to multi-rack configurations as well, with capacities of up to 10.8 Billion Gates .Ukraine Unleashes Nikola Tesla’s Weapon In The Black Sea The Synopsys ZeBu-200 emulation system has been updated and upgraded as well, to support a design capacity of up to 15.4 BG, with up to double the runtime performance compared to the previous generation ZeBu EP2. The ZeBu-200 also offers faster compile times and up to 8X better debug bandwidth. Synopsys claims the ZeBu-200 offers up to 200 GB debug trace memory per module, with improved job scheduling and relocation too. All of this essentially equates to reduced turnaround times and increased development productivity – something all chip makers sorely need. Before sending any chip design off to the fab, it requires extensiveSynopsys isn’t just about hardware and chip innovations, however. Its new Virtualizer Native Execution on Arm-based hardware will do for software development, what its HAPS and ZeBu systems do for prototyping and emulation. The Synopsys Virtualizer Native Execution on Arm will effectively accelerate software development for edge devices by improving capabilities and productivity of teams building software-defined products that leverage Arm architectures and instruction sets. As most of you probably know, Arm is near ubiquitous in the automotive, mobile, High-Performance Computing , and Internet of Things markets.“Software-defined products are driving a re-engineering of product development from silicon to systems,” said Ravi Subramanian, chief product management officer, Synopsys. “Virtualizer Native Execution on Arm accelerates hardware/software co-design by enabling new agile software development methodologies for Arm-based edge and high-performance computing applications.” These kinds of performance increases across virtually every design and development stage are key for chip, system and platform designers in the current AI era, to remain competitive, reduce turnaround time and help speed time to market. A multitude of companies, from NVIDIA and AMD to, have all committed to yearly updates for some new product releases. That is a tall order for any tech company, and tools like these offered by Synopsys are practically a prerequisite to achieve those goals in the current landscape. Chips and systems are getting more complex and there is a shortage of humans with the experience and expertise to design and build them. Faster, more capable, intelligent tools are paramount to ensure quality and ensure optimal time to market. The Synopsys HAPS-200 prototyping system and Virtualizer Native Execution on the Arm hardware suite are available now. The Synopsys ZeBu-200 emulation system, however, is available for early access customers only at this time.
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