Marco Chiappetta is the co-founder of HotTech Vision And Analysis and the Managing Editor of HotHardware.com. His work has been published worldwide, in a myriad of educational and technology-related print and web publications. He has been a computing and technology enthusiast since the days of the Commodore P.E.T.
The Universal Chiplet Interconnect Express Consortium was formed in March of 2022, in an effort to standardize chiplet die-to-die interconnect technology and help establish an open chiplet ecosystem. The initial members of the consortium included a number of industry heavyweights, including ASE, AMD, Arm, Google Cloud, Intel, Meta, Microsoft, Qualcomm, Samsung, and TSMC, to name a few.
outlines a standardized die-to-die interconnect with physical layer, protocol stack, software model, and compliance testing. It was devised to afford members the ability to mix and match chiplet components from multiple vendors, and to facilitate and enable more rapid System-On-A-Chip design and development. Since then, the UCIe 2.0 spec has been released, which expands on the original with support for manageability system architectures and more advanced 3D packaging technologies. A few days ago, Synopsys propelled UCIe even further, with the launch of its own IP solution operating at up to 40 Gbps per pin, which results in 25% higher bandwidth than the current UCIe spec. Theaffords up to 12.9Tbps per mm of data to efficiently travel between heterogeneous and/or homogeneous chiplet dies, with minimal silicon footprint. Higher bandwidth between chiplets is critical for enabling next-generation processor designs, and advanced AI and automotive ADAS systems, which must move massive amounts of data. Of note is that, despite its higher performance, Synopsys’ IP remains compliant with the UCIe 2.0 specification.“Launching the industry’s first complete 40G UCIe IP solution underscores Synopsys’ continued investment in advancing semiconductor innovation,” said Michael Posner, vice president of IP product management at Synopsys. “Our active contribution to the UCIe consortium has enabled us to deliver a robust UCIe solution that helps our customers successfully develop and optimize their multi-die designs for high-performance AI computing systems.”’ 40G UCIe IP solution consists of controller, PHY, and verification technology, with integrated signal integrity monitors and testability features to simplify bring-up and debugging, and ultimately improve reliability. The 40G UCIe IP is also built on the company’s silicon-proven architecture, which has already shown interoperability with advanced processes and supports all common SoC interface fabrics. There are a number of quality-of-life improvements that come as part of this launch as well. Synopsys’ 40G UCIe IP solution has features that ease integration, including a single 100MHz reference clock for all UCIe PHYs that eliminates the need for additional high-frequency system PLLs. And it also supports today’s standard and advanced packaging technologies, to afford customers flexibility when designing andOur community is about connecting people through open and thoughtful conversations. We want our readers to share their views and exchange ideas and facts in a safe space.Insults, profanity, incoherent, obscene or inflammatory language or threats of any kindContinuous attempts to re-post comments that have been previously moderated/rejectedAttempts or tactics that put the site security at riskProtect your community.
United States Latest News, United States Headlines
Similar News:You can also read news stories similar to this one that we have collected from other news sources.
Ford CEO Calls Dark Horse A Sub-Brand, Might Hint At Future High-Performance ModelsSo far we've only seen a Dark Horse coupe and a Dark Horse R race car
Read more »
Mercedes Launches Investigation After Puzzling Performance Swings Ahead Of Italian GPMercedes has been very dominant claiming victories in three of the last four races. Mercedes boss Toto Wolff believes some upgrades made to the cars led to a dr
Read more »
Lauryn Hill Delivers a Surprise Performance at Her High School Reunion in New JerseyLauryn Hill performed at her high school reunion. Watch the video clips.
Read more »
Police warn of car thieves targeting 'high performance' vehicles in AbingtonInvestigators in Abington are warning owners of “high performance' model cars to lock their vehicles after a recent uptick in thefts.
Read more »
Defining chronic pain for high-performance athletes with disabilitiesThe extensive training and the sacrifices athletes make to compete at the Olympic games take center stage. For Paralympians and high-performance athletes with spinal cord injuries (SCI), assessing chronic pain plays a key role in their training and readiness to compete.
Read more »
Utah's Cam Rising returns for career-high performance in openerOne half of the seventh-year QB's throws were touchdown on Thursday night
Read more »