Beyond the Breaking News

Scientists stack three silicon layers to build faster, denser 3D chips

3D Chips News

Scientists stack three silicon layers to build faster, denser 3D chips
AI HardwareChip ManufacturingMonolithic Integration

Researchers stack silicon circuits vertically to build 3D chips that could extend Moore's law beyond current limits.

Researchers at the University of Illinois Urbana-Champaign have developed a way to stack high-performance silicon circuits directly on top of one another, a breakthrough that could help the semiconductor industry keep increasing computing power without shrinking transistors further.

The approach tackles one of the biggest challenges facing chipmakers as Moore’s law begins to slow. For decades, the industry boosted performance by making transistors smaller and packing more of them onto a chip. But as devices approach fundamental physical limits, further miniaturization is becoming increasingly difficult. Instead of shrinking components, the Illinois team is building upward.

By stacking multiple layers of silicon circuits, engineers can increase transistor density, reduce communication distances inside chips, and improve energy efficiency. The researchers say their process could accelerate the development of monolithic three-dimensional chips, a long-sought technology that many experts see as the next step in semiconductor scaling.

“Take something as simple as static random-access memory, which is universal in CPUs and GPUs. Today it takes six microelectronic devices called transistors on a single plane to store one bit of information. With vertical integration, you can distribute them across multiple layers.

It’s like replacing a sprawling suburb with high-rises: you get the same functionality, but the spatial footprint is reduced while making communication between layers faster and more efficient,” said Qing Cao, associate professor of materials science and engineering. While three-dimensional chip technologies already exist commercially, most rely on bonding together separately manufactured wafers. That approach creates relatively large connections between layers and limits how densely components can be integrated.

Monolithic three-dimensional integration takes a different route by building each circuit layer directly on top of the previous one. The method allows much denser vertical connections and more precise alignment between layers, potentially leading to faster and more efficient chips. The challenge has been temperature. Manufacturing high-performance silicon devices typically requires temperatures approaching 1,000 degrees Celsius.

However, once the first layer of circuits and metal wiring is completed, additional layers must remain below about 400 degrees Celsius to avoid damaging existing structures.onto completed circuit layers. The bonding process requires temperatures no higher than 200 degrees Celsius, staying well within the industry’s thermal budget.

“Vertical integration is already starting to make its way into commercial devices, particularly in specialized AI hardware, but monolithic integration is what unlocks the full promise of 3D chips. For the first time, we have met the thermal budget of monolithic 3D integration using standard single-crystalline silicon and delivered unprecedented performance,” Cao said. The team also redesigned transistor fabrication to avoid high-temperature processing steps.

Instead of conventional transistor structures, they used junctionless transistors that can be prepared before the stacking process begins. Using the technique, the researchers built three stacked silicon layers containing 625 transistors each. The devices achieved yields between 98% and 100% while delivering performance comparable to standard silicon transistors fabricated at much higher temperatures.

“But most importantly, we’ve shown that this process is scalable,” Cao said. “You can keep stacking layers beyond the three we demonstrated. ” The researchers are now working to transfer the technology into an industrial semiconductor foundry with support from industry partners including IBM, Intel, and TSMC. With over a decade-long career in journalism, Neetika Walter has worked with The Economic Times, ANI, and Hindustan Times, covering politics, business, technology, and the clean energy sector.

Passionate about contemporary culture, books, poetry, and storytelling, she brings depth and insight to her writing. When she isn’t chasing stories, she’s likely lost in a book or enjoying the company of her dogs.

GooglePlease follow us on Google to support us
We have summarized this news so that you can read it quickly. If you are interested in the news, you can read the full text here. Read more:

IntEngineering /  🏆 287. in US

AI Hardware Chip Manufacturing Monolithic Integration Moore's Law Semiconductor Technology Semiconductors Silicon Transistors

 

United States Latest News, United States Headlines

Similar News:You can also read news stories similar to this one that we have collected from other news sources.

Demi Moore accuses Rumer’s ‘aggressive’ ex of ruining grandchild’s home birthDemi Moore accuses Rumer’s ‘aggressive’ ex of ruining grandchild’s home birthThe Oscar nominee has submitted a declaration in support of Rumer Willis’s legal fight against her musician ex-boyfriend to gain custody of their 3-year-old daughter.
Read more »

17th-century Shipwreck Wood Transformed Into Dresses by Finnish Researchers17th-century Shipwreck Wood Transformed Into Dresses by Finnish ResearchersHowever unlikely as it might sound, researchers have transformed 300-year-old salvaged wood into a fiber that has been spun into a fashion design.
Read more »

Demi Moore Claims Ex-Partner of Daughter Rumer Willis Exhibited 'Aggressive' Behavior During BirthDemi Moore Claims Ex-Partner of Daughter Rumer Willis Exhibited 'Aggressive' Behavior During BirthDemi Moore has made bombshell allegations against her daughter Rumer Willis's ex-partner and father of her child, Derek Richard Thomas, in a court declaration. The actress, 63, claimed that Thomas exhibited 'aggressive' behavior during the birth of their daughter Louetta in April 2023.
Read more »

Jennifer Garner and Julianne Moore's Chic Airport Uniform StyleJennifer Garner and Julianne Moore's Chic Airport Uniform StyleJennifer Garner and Julianne Moore are two celebrities who have mastered the art of chic airport uniform style. They always wear loose, billowy clothes, an oversized designer bag, and a pair of stylish shoes. However, their go-to shoes tend to sell out quickly. To channel their rich mom look, we went with the next best thing: the all-white shoe style.
Read more »



Render Time: 2026-07-17 02:48:04