Researchers have demonstrated a lithography-free process that uses electric fields to align and connect 2D semiconductors, forming fully functional logic circuits.
Transistors, the fundamental building blocks of digital logic, are now being made just a few dozen atoms wide. At these incredibly small scales, traditional silicon fabrication faces significant challenges: etching such tiny features can lead to electrical interference, current leakage, and manufacturing processes so complex they are increasingly difficult to sustain.
The decades-long strategy of cramming more transistors into the same chip area is rapidly approaching its practical limits, and conventional methods may no longer deliver consistent performance gains. As a result, engineers are actively exploring new materials, innovative architectures, and advanced fabrication techniques to overcome these barriers and keep pushing the boundaries of computing power.Building circuits from 2D materials proves harder than expectedTwo-dimensional semiconductors, which can be sliced down to a single atomic layer, show particular promise – materials like molybdenum disulfide and tungsten diselenide allow efficient charge flow even when ultra-thin and can be tuned as n-type or p-type transistors, the two essential components for logic circuits.But making circuits from these materials is still a challenge. Current methods require high temperatures, vacuum chambers, or manual nanosheet placement, making large-scale production difficult. Scaling up often results in inconsistent quality, poor alignment, or complicated fabrication that undermines the materials’ simplicity and potential.A study published in Advanced Functional Materials now offers a new approach to building atomically thin logic circuits. The researchers combined solution-based exfoliation of 2D semiconductors with electric-field-guided assembly, allowing n-type MoS₂ and p-type WSe₂ nanosheets to be precisely positioned between predefined electrodes, Nanowerk writes.This creates complementary logic circuits without lithography, etching, or high-temperature processes. The assembly occurs in parallel, enabling multiple devices to be fabricated on a single chip in one step, by simplifying production and preserving the performance benefits of 2D materials.New method creates large, stable 2D nanosheetsThe new method produces high-quality 2D nanosheets from bulk crystals without damaging them. Instead of harsh techniques, it uses electrochemical exfoliation: a voltage inserts large ions between crystal layers, loosening the bonds. Gentle sonication then separates the layers into stable nanosheets. These sheets remain suspended in liquid and measure over one micron across, much larger than those made with traditional mechanical methods.The team refined the process for better results – tapered electrodes shaped the electric field and reduced stray deposition, while a 50 Hz AC signal balanced nanosheet alignment and adhesion. Additionally, a 15-second application produced 10-nanometer-thick, uniform channels.However, even high-quality 2D materials can have atomic defects, like missing sulfur or selenium atoms, which affect electrical behavior. The researchers corrected this with a chemical treatment using the superacid bissulfonimide .As a result, the process showed that 2D materials can form functional logic circuits and memory devices – including inverters, NAND and NOR gates, and SRAM cells – with low power use, accurate outputs, and reliable memory retention.
Electric Fields Energy &Amp Environment Logic Circuits Science Silicon
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