Apple's upcoming M5 series chips will utilize TSMC's advanced 3nm N3P process and a new packaging technology called SoIC-mH, promising improved thermal performance and production yields. The high-end M5 chips are expected to feature separate CPU and GPU designs, potentially enabling them to handle demanding AI workloads.
Analyst Ming-Chi Kuo reports that Apple 's upcoming M5 series chips will be manufactured using TSMC 's third-generation 3nm N3P process. Mass production of the M5 is slated for the first half of 2024, followed by the M5 Pro/Max in the second half of 2025 and the M5 Ultra in 2026. Notably, the M5 Pro, M5 Max, and M5 Ultra will utilize TSMC 's advanced SoIC-mH (System-on-Integrated-Chips-Molding-Horizontal) packaging, which enhances thermal performance and production yields.
This shift towards separate CPU and GPU chips for the high-end M5 series deviates from the traditional Systems-on-a-Chip (SoC) design commonly used in smartphones. While SoC designs prioritize size and communication efficiency, SoIC-mH packaging allows for better heat dissipation, enabling the chips to operate at peak performance for extended periods. Kuo suggests that these high-end M5 chips are optimized for AI applications and will power Apple's Private Cloud Compute (PCC) servers
Apple M5 TSMC Soic-Mh AI Performance
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