Apple Delays 2nm Chip Adoption for iPhone

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Apple Delays 2nm Chip Adoption for iPhone
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Due to the high cost of manufacturing using TSMC's 2nm node, Apple has decided to use the third-gen 3nm node (N3P) for its 2025 iPhone processors. This means the 2nm chipsets will be implemented in the iPhone 18 series in 2026.

Apple has been accused of being many things but being cheap is not one of them. Originally, rumors called for series produced by TSMC using its new 2nm node. However, it appears that the cost of using TSMC 's 2nm node this year to build the A19 and A19 Pro chipsets has led Apple to decide to have TSMC use its third-gen 3nm node (N3P) to manufacture the processors powering the 2025 iPhone line.

In other words, thanks to the cost of using 2nm this year to build the A19 and A19 Pro chipsets, Apple will delay the use of 2nm chipsets for the iPhone until the iPhone 18 series in 2026 which will be powered by the A20 and A20 Pro application processors. Part of the issue is the cost of the silicon wafers used to build the chips which, at $30,000 per wafer, runs into plenty of money. The process node used to build a chip is important because lower process nodes mean smaller transistors and that means more transistors can be shoehorned inside a chip. The higher the transistor count, the more powerful and or energy-efficient that chip is. Also important is the transistor density which measures the number of transistors that fit inside a given area of a chip. A higher transistor density leads to increased performance, less power consumption, and more functionality for a chip. The 3nm A18 Pro application processor powers the iPhone 16 Pro and iPhone 16 Pro Max. Compared to its 3nm chips, TSMC's 2nm node will increase transistor density by 15%, increase performance by 15% at the same power consumption, and reduce power consumption by 24% to 35% at the same performance level. As we've discussed before, TSMC's 2nm node includes the use of gate-all-around (GAA) transistors which cover the channel on all four sides thanks to the use of vertically placed horizontal nanosheets. This leads to reduced current leakage and improves the drive current to enhance the performance and energy efficiency of a chi

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